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Electron mobility in silicon nanowires

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arxiv 0806.4347 v1 pith:BUTSUG4O submitted 2008-06-26 cond-mat.mtrl-sci cond-mat.mes-hall

Electron mobility in silicon nanowires

classification cond-mat.mtrl-sci cond-mat.mes-hall
keywords mobilitywidthdecreasingelectronwirefieldsphonon-limitedsilicon
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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The low-field electron mobility in rectangular silicon nanowire (SiNW) transistors was computed using a self-consistent Poisson-Schr\"{o}dinger-Monte Carlo solver. The behavior of the phonon-limited and surface-roughness-limited components of the mobility was investigated by decreasing the wire width from 30 nm to 8 nm, the width range capturing a crossover between two-dimensional (2D) and one-dimensional (1D) electron transport. The phonon-limited mobility, which characterizes transport at low and moderate transverse fields, is found to decrease with decreasing wire width due to an increase in the electron-phonon wavefunction overlap. In contrast, the mobility at very high transverse fields, which is limited by surface roughness scattering, increases with decreasing wire width due to volume inversion. The importance of acoustic phonon confinement is also discussed briefly.

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