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Preliminary demonstration of a persistent Josephson phase-slip memory cell with topological protection

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arxiv 2005.14298 v2 pith:MU6PPONE submitted 2020-05-28 cond-mat.mes-hall cond-mat.supr-con

Preliminary demonstration of a persistent Josephson phase-slip memory cell with topological protection

classification cond-mat.mes-hall cond-mat.supr-con
keywords superconductingmemoryphase-slipcelljosephsontopologicalclassicalhere
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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Superconducting computing promises enhanced computational power in both classical and quantum approaches. Yet, scalable and fast superconducting memories are not implemented. Here, we propose a fully superconducting memory cell based on the hysteretic phase-slip transition existing in long aluminum nanowire Josephson junctions. Embraced by a superconducting ring, the memory cell codifies the logic state in the direction of the circulating persistent current, as commonly defined in flux-based superconducting memories. But, unlike the latter, the hysteresis here is a consequence of the phase-slip occurring in the long weak link and associated to the topological transition of its superconducting gap. This disentangle our memory scheme from the large-inductance constraint, thus enabling its miniaturization. Moreover, the strong activation energy for phase-slip nucleation provides a robust topological protection against stochastic phase-slips and magnetic-flux noise. These properties make the Josephson phase-slip memory a promising solution for advanced superconducting classical logic architectures or flux qubits.

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