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Mitigating Power Side Channels during Compilation

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arxiv 1902.09099 v1 pith:CRXKLKFB submitted 2019-02-25 cs.CR cs.PL

Mitigating Power Side Channels during Compilation

classification cs.CR cs.PL
keywords methodcodesideanalysischannelleaksllvmmitigated
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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The code generation modules inside modern compilers such as GCC and LLVM, which use a limited number of CPU registers to store a large number of program variables, may introduce side-channel leaks even in software equipped with state-of-the-art countermeasures. We propose a program analysis and transformation based method to eliminate this side channel. Our method has a type-based technique for detecting leaks, which leverages Datalog-based declarative analysis and domain-specific optimizations to achieve high efficiency and accuracy. It also has a mitigation technique for the compiler's backend, more specifically the register allocation modules, to ensure that potentially leaky intermediate computation results are always stored in different CPU registers or spilled to memory with isolation. We have implemented and evaluated our method in LLVM for the x86 instruction set architecture. Our experiments on cryptographic software show that the method is effective in removing the side channel while being efficient, i.e., our mitigated code is more compact and runs faster than code mitigated using state-of-the-art techniques.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. Efficient Detection and Quantification of Timing Leaks with Neural Networks

    cs.CR 2019-07 unverdicted novelty 6.0

    Neural networks are trained as timing models of programs and analyzed via MILP to detect and quantify timing side-channel information leaks.