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A Driver ASIC for Scientific CCD Detectors Using 180nm Technology

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arxiv 1805.12211 v2 pith:D67CMCUI submitted 2018-05-29 physics.ins-det

A Driver ASIC for Scientific CCD Detectors Using 180nm Technology

classification physics.ins-det
keywords driverasicvoltagebeenbiascircuitclockclocks
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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In order to achieve the driver function for several types of scientific CCD detector from E2V Co Ltd, and decreasing the size of electronics of CCD detector system, an Application-specified Integrated Circuit (ASIC) was designed. It provides multi-channel clocks and bias voltage for CCD driver. In the ASIC, the clock drivers are made of a clock switch circuit and high voltage amplifier. Two 8-bit current-steering DACs are used to adjust the driver capability and high-level voltage of clocks. The bias drivers are generated by 8-bit current-steering DACs and off-chip operation amplifiers. The Global Foundry 180 nm BCDlite technology is selected to implement this design. The first version of design has been finished and the tests have been done.

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