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Comparison of Josephson vortex flow transistors with different gate line configurations

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arxiv cond-mat/0101183 v1 pith:Z2ESAHXU submitted 2001-01-12 cond-mat.supr-con

Comparison of Josephson vortex flow transistors with different gate line configurations

classification cond-mat.supr-con
keywords josephsonjfatjunctionssimulationscurrentdifferentexperimentsflow
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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We performed numerical simulations and experiments on Josephson vortex flow transistors based on parallel arrays of YBa2Cu3O(7-x) grain boundary junctions with a cross gate-line allowing to operate the same devices in two different modes named Josephson fluxon transistor (JFT) and Josephson fluxon-antifluxon transistor (JFAT). The simulations yield a general expression for the current gain vs. number of junctions and normalized loop inductance and predict higher current gain for the JFAT. The experiments are in good agreement with simulations and show improved coupling between gate line and junctions for the JFAT as compared to the JFT.

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