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Pure Tensor Program Rewriting via Access Patterns (Representation Pearl)

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arxiv 2105.09377 v1 pith:ZDSJ72BB submitted 2021-05-19 cs.PL

Pure Tensor Program Rewriting via Access Patterns (Representation Pearl)

classification cs.PL
keywords rewritinglow-levelpuretermglensidehardwareprogramtensor
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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Tensor kernels in machine learning (ML) often correspond to pure mathematical expressions, making term rewriting an attractive strategy for optimization and mapping to specialized hardware accelerators. However, existing ML intermediate representations (IRs) tend to either be \textit{pure but high-level}, making low-level rewrites to hardware targets inexpressible, or \textit{low-level but impure}, hampering the use of term rewriting altogether. This paper introduces Glenside, a pure IR whose core abstraction -- the \textit{access pattern} -- enables low-level, layout-aware, hardware-centric program rewrites. We demonstrate how term rewriting in Glenside can be used to map program fragments to hardware accelerator invocations and automatically discover classic data layout transformations like \texttt{im2col}. Glenside establishes a new foundation for exploring further term rewriting techniques in optimizing low-level tensor programs.

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