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An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation

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arxiv 1803.11207 v2 pith:J4AJDKAA submitted 2018-03-13 cs.AR

An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation

classification cs.AR
keywords indexbic32k16bitmapbic64k8creationparallelacceleratorarray
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
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Bitmap index is recognized as a promising candidate for online analytics processing systems, because it effectively supports not only parallel processing but also complex and multi-dimensional queries. However, bitmap index creation is a time-consuming task. In this study, by taking full advantage of massive parallel computing of field-programmable gate array (FPGA), two hardware accelerators of bitmap index creation, namely BIC64K8 and BIC32K16, are originally proposed. Each of the accelerator contains two primary components, namely an enhanced content-addressable memory and a query logic array module, which allow BIC64K8 and BIC32K16 to index 65,536 8-bit words and 32,768 16-bit words in parallel, at every clock cycle. The experimental results on an Intel Arria V 5ASTFD5 FPGA prove that at 100 MHz, BIC64K8 and BIC32K16 achieve the approximate indexing throughput of 1.43 GB/s and 1.46 GB/s, respectively. The throughputs are also proven to be stable, regardless the size of the data sets. More significantly, BIC32K16 only consumes as low as 6.76% and 3.28% of energy compared to the central-processing-unit- and graphic-processing-unit-based designs, respectively.

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